URL https://opencores.org/ocsvn/versatile_mem_ctrl/versatile_mem_ctrl/trunk

Subversion Repositories versatile_mem_ctrl

[/] - Rev 59

Rev	Log message	Author	Age	Path
59	counter changed to shift register	unneback	5221d 04h	/
58	sdr_16 fixes for timing - extra egress register stage, appropriate changes in sdr_16 fsm	julius	5222d 05h	/
57	added support for early termination of burst access	unneback	5223d 07h	/
56	corrected fifo_rd_data in state w4d	unneback	5225d 00h	/
55	Fixed up sdr16 dqm output	julius	5225d 19h	/
54	dqm moved into FSM	unneback	5226d 16h	/
53		unneback	5226d 16h	/
52	act exit for read updated	unneback	5227d 17h	/
51	act exit for read updated	unneback	5227d 17h	/
50	Fixed up make file - THIS MAY BREAK THINGS, but it's a lot neater and easier to use, also dependencies are now properly configured, and we don't remake things unecessarily	julius	5227d 20h	/
49	Added versatile_fifo_dual_port_ram_dc_sw.v rule to makefile, getting it from versatile fifo project	julius	5227d 21h	/
48	dq_oe fix	unneback	5227d 21h	/
47	support for registered outputs on ras, cas and we	unneback	5227d 22h	/
46	cosmetic updates	unneback	5227d 23h	/
45	added	unneback	5228d 01h	/
44	registered row comparison	unneback	5230d 01h	/
43		unneback	5230d 07h	/
42	added pipeline stage for egress FIFO readot	unneback	5230d 14h	/
41	Added two alternate data capture functions.	mikaeljf	5230d 22h	/
40	updated fifo interfaces with re/rd and we/wr	unneback	5231d 05h	/