URL https://opencores.org/ocsvn/versatile_mem_ctrl/versatile_mem_ctrl/trunk

Subversion Repositories versatile_mem_ctrl

[/] - Rev 68

Rev	Log message	Author	Age	Path
68	cleaqnup	unneback	5236d 19h	/
67	added FSM for wb if	unneback	5236d 19h	/
66		unneback	5236d 22h	/
65	added	unneback	5236d 22h	/
64	Changed sdr 16 FSM to use defines instead of parameters which were somehow screwing up synplify, reinstated used of sdr_16_defines.v file	julius	5237d 22h	/
63	Fixed a couple of sdr_16 bugs to do with tracking of opened banks	julius	5238d 05h	/
62	Added note to sdr_16_defines.v asking if it's still used	julius	5238d 07h	/
61	Fixed blocking/nonblocking assign issue in sdr_16 fsm	julius	5242d 05h	/
60	Added synthesis directives ensuring registering of right signals in IOBs for sdr16 controller. Removed comment stripping from vppreproc command for sdr_16 creation.	julius	5242d 06h	/
59	counter changed to shift register	unneback	5242d 07h	/
58	sdr_16 fixes for timing - extra egress register stage, appropriate changes in sdr_16 fsm	julius	5243d 08h	/
57	added support for early termination of burst access	unneback	5244d 11h	/
56	corrected fifo_rd_data in state w4d	unneback	5246d 03h	/
55	Fixed up sdr16 dqm output	julius	5246d 22h	/
54	dqm moved into FSM	unneback	5247d 19h	/
53		unneback	5247d 20h	/
52	act exit for read updated	unneback	5248d 21h	/
51	act exit for read updated	unneback	5248d 21h	/
50	Fixed up make file - THIS MAY BREAK THINGS, but it's a lot neater and easier to use, also dependencies are now properly configured, and we don't remake things unecessarily	julius	5249d 00h	/
49	Added versatile_fifo_dual_port_ram_dc_sw.v rule to makefile, getting it from versatile fifo project	julius	5249d 01h	/