Rev |
Log message |
Author |
Age |
Path |
25 |
BIT and MCS files for Spartan 3E Starter Kit, using Monitor 4.0C Serial
Monitor for I/O instead of Flashwriter2. Use male DB9 Serial Port on Spartan
3E Starter Kit for console, 115200,7,S,1
at monitor prompt, 'G E80C' to boot CP/M. |
hharte |
5685d 00h |
/ |
24 |
Fix dat width |
hharte |
5686d 09h |
/ |
23 |
Fix shifted keys,
start adding support for ctrl keys. |
hharte |
5686d 09h |
/ |
22 |
Fix UART to work as Bitstreamer serial ports. |
hharte |
5686d 09h |
/ |
21 |
Update to latest version of wb_ddr from soc_lm32 project |
hharte |
5686d 09h |
/ |
20 |
Update to latest version of wb_ddr core from soc-lm32 project |
hharte |
5686d 09h |
/ |
19 |
Fix Address Width parameter |
hharte |
5686d 09h |
/ |
18 |
Fix incorrect first row of each character in first column. |
hharte |
5686d 10h |
/ |
17 |
Clean up comments/whitespace. |
hharte |
5691d 23h |
/ |
16 |
Boots Vector Graphic CP/M 2.2 from FLASH disk image.
Added ISE Project files, MCS and BIT files for programming the FPGA. |
hharte |
5692d 04h |
/ |
15 |
Constraint file for S3E Starter Kit |
hharte |
5692d 04h |
/ |
14 |
Deleted, moved to S3E SK Directory. |
hharte |
5692d 04h |
/ |
13 |
Changed I/O addressing so addresses are not shifted left by two bits.
Commented out DDR controller, and replaced with 8K of SRAM.
Replaced FLASH memory interface with 4K SRAM.
Added Vector HD/FD Disk Controller, using FLASH memory for storage.
This design can now boot Vector Graphic 56K CP/M 2.2. But be aware
that there is only 12K in the TPA, since the Spartan3E does not have
enough block RAM to make more.
This system is enough to test the Z80 core more thorougly. The
EXZ80ALL.COM program on the included disk image tests all documented
Z80 instructions. Some tests pass, some don't. This means there is
more work to be done on the wb_z80 core. |
hharte |
5692d 04h |
/ |
12 |
Initial implementation of a Vector Graphic HD/FD Disk Controller
with Wishbone interface. See the PDF in /doc for more information
about this controller.
For now, the storage is implemented in FLASH memory, which is read-only
to the controller. Also, the controller does not check (CRC) the disk
sector data, like the original does. Instead, it inserts 00's where the
CRC goes, to simulate a correctly checked CRC.
I am able to boot CP/M 2.2 using this controller, with the vgboot.mcs image
programmed into FLASH. See the diskimage/ directory. |
hharte |
5692d 04h |
/ |
11 |
Fully parameterize so different size SRAMs can be instantiated. |
hharte |
5692d 04h |
/ |
10 |
Change address mapping for I/O cycles. |
hharte |
5692d 04h |
/ |
9 |
Change default mapping.
Update address decoding for I/O Space. |
hharte |
5692d 04h |
/ |
8 |
CLarified the instructions a bit, and added some Internet links. |
hharte |
5692d 09h |
/ |
7 |
Add Vector HD/FD Boot Disk Image and instructions. |
hharte |
5692d 10h |
/ |
6 |
Vector Hard Disk/Floppy Disk Controller Manual |
hharte |
5693d 07h |
/ |