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Rev Log message Author Age Path
10 - add sources for C++/Tcl based backend, add directories
- tools/src/...
- tools/tcl/...
- tools/dox
- tools/make
- add rlink test system
- rtl/sys_gen/tst_rlink/nexys2/...
wfjm 4964d 04h /
9 - interim release w11a_V0.52 (untagged)
- migrate to rbus protocol verion 3
- reorganize rbus and rlink modules, many renames
wfjm 5054d 01h /
8 - interim release w11a_V0.51 (untagged)
- migrate to ibus protocol verion 2
- nexys2 systems now with DCM derived system clock supported
- sys_w11a_n2 now runs with 58 MHz clksys
wfjm 5089d 16h /
7 tag w11a_V0.5 wfjm 5216d 20h /
6 last touchup of README.txt wfjm 5216d 20h /
5 additional documentation wfjm 5217d 19h /
4 additional documentation wfjm 5223d 20h /
3 setup all svn:ignore props wfjm 5230d 21h /
2 initial source upload (no docs yet) wfjm 5230d 21h /
1 The project and the structure was created root 5233d 21h /

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