URL https://opencores.org/ocsvn/wbuart32/wbuart32/trunk

Subversion Repositories wbuart32

[/] - Rev 26

Rev	Log message	Author	Age	Path
26	Formally verified the TXUART core (plus others)	dgisselq	2056d 13h	/
25		dgisselq	2257d 22h	/
24	Fixed the broken TX interrupt flagg	dgisselq	2257d 22h	/
23	Brought SVN repo up to date with github repo	dgisselq	2257d 22h	/
22	Added formal methods via SymbiYosys	dgisselq	2349d 20h	/
21	Updates based upon Formal methods	dgisselq	2349d 20h	/
20	Added yosys-smtbmc config files for formal proofs	dgisselq	2544d 16h	/
19	Added a directory for formal info	dgisselq	2544d 16h	/
18	Lots of updates. See the git log for details	dgisselq	2544d 16h	/
17	Biggest change: default_nettype Also fixed potential ufifo overload condition, and wbuart not calling txuartlite when so instructed.	dgisselq	2752d 18h	/
16	Updated the property list for cpp directory.	dgisselq	2776d 23h	/
15	Added a set of lite-UARTs that only handle 8N1 to the repository.	dgisselq	2776d 23h	/
14	This version works on hardware.	dgisselq	2812d 01h	/
13	Adjusted documentation of OPT_STANDALONE, and updated internal README files.	dgisselq	2812d 21h	/
12	Added hardware flow control information to the specification.	dgisselq	2812d 22h	/
11	Modified mkspeech to create both hex and include files, to tailor for the broken ISE program.	dgisselq	2812d 22h	/
10	Adjusted for the new hardware flow control capability.	dgisselq	2812d 22h	/
9	Added a hardware flow control capability.	dgisselq	2812d 22h	/
8	Updated the documents to reference the new testbenches.	dgisselq	2844d 01h	/
7	Moved the definition of state to before its first usage.	dgisselq	2844d 01h	/