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Rev Log message Author Age Path
28 Added comment line rehayes 5509d 14h /
27 Subversion test, no actual code changes rehayes 5522d 12h /
26 Add synopsys commands, add else defaults for semphore state machine. rehayes 5524d 15h /
25 Fix connected net name rehayes 5524d 15h /
24 Delete unused inputs rehayes 5524d 17h /
23 Oct 7, 2009 Update rehayes 5530d 14h /
22 Updated with figures and some new features rehayes 5530d 14h /
21 Added timeout, total error count, and XGCHN test rehayes 5530d 14h /
20 Added event signal for compare error tracking in top level test bench. rehayes 5530d 14h /
19 Verilog memory image for testing rehayes 5530d 14h /
18 Complete XGCHN test code rehayes 5530d 14h /
17 Additions for XGCHID debug commands rehayes 5530d 14h /
16 Copy of what was in the bench directory rehayes 5530d 14h /
15 Fix R1 load at boot up, add debug features rehayes 5543d 12h /
14 Sept 23 2009 Change update rehayes 5544d 14h /
13 Debug functions test code rehayes 5544d 14h /
12 Single step debug working, added software error interrupt output, added WISHBONE master module, fixed control register bits rehayes 5544d 14h /
11 Update with Single Step debuging test rehayes 5544d 14h /
10 Minor Cleanup rehayes 5549d 14h /
9 Update for new testbench usage rehayes 5550d 13h /

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