URL https://opencores.org/ocsvn/xgate/xgate/trunk

Subversion Repositories xgate

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Rev	Log message	Author	Age	Path
83	Add subroutine quailifier.	rehayes	5220d 23h	/
82	Added debug module to assist in software debugging.	rehayes	5221d 18h	/
81	Initial checkin of the SKIPJACK encrypt/decrypt application program	rehayes	5221d 19h	/
80	Added IRQ bypass registers and Test bench appendix	rehayes	5283d 19h	/
79	Added IRQ bypass registers and Test bench appendix	rehayes	5283d 19h	/
78	Added IRQ bypass registers and Test bench appendix	rehayes	5283d 19h	/
77	Documentation update	rehayes	5283d 19h	/
76	Updated xgate_risc.v for xlink synthesis warnings.	rehayes	5306d 20h	/
75	Fixed xlink synthesis warnings noted by Nachiket Jugade, missing else statment for chid_sm_ns line 393, mising default on shifter lines 2382	rehayes	5306d 21h	/
74	Code cleanup, eliminated index 0 of input and output interrupts.	rehayes	5311d 21h	/
73	Code cleanup, eliminated index 0 of input and output interrupts.	rehayes	5311d 22h	/
72	Code cleanup, eliminated index 0 of input and output interrupts.	rehayes	5311d 22h	/
71	Added irq bypass registers to rtl, testbench and doc.	rehayes	5313d 00h	/
70	Updated with interrupt bypass controll registers.	rehayes	5313d 00h	/
69	New test to verify irq interrupt priority encoder.	rehayes	5313d 00h	/
68	Added new test for interrupt priority and updated WISHBONE slave module with semaphore register.	rehayes	5313d 01h	/
67	Added irq bypass function and controll registers. Made lowest interrupt index highest priority.	rehayes	5313d 01h	/
66	Fix testbench and RISC core related to debug mode and wait states.	rehayes	5332d 21h	/
65	Parameterize delays based on number of RAM wait states.	rehayes	5332d 21h	/
64	Fixed more bugs related to wait states and debug mode.	rehayes	5332d 21h	/

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Subversion Repositories xgate

[/] - Rev 83

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