URL https://opencores.org/ocsvn/xgate/xgate/trunk

Subversion Repositories xgate

[/] - Rev 94

Rev	Log message	Author	Age	Path
94	Update irq test to check all interrupts, add sync reset test. All this to improve code coverage.	rehayes	4729d 02h	/
93	Initial revision, memory image for skipjack test.	rehayes	4729d 02h	/
92	Add sync reset to bypass register.	rehayes	4729d 02h	/
91	Update to use one ISR to handle all 127 interrupts.	rehayes	4729d 02h	/
90	Cosmetic omment changes.	rehayes	4729d 02h	/
89	Code cleanup.	rehayes	4743d 01h	/
88	Updated with complete code	rehayes	4816d 10h	/
87	First pass JTAG TAP, state machine working but needs work to complete reset of TAP.	rehayes	4943d 00h	/
86	Add JTAG test tasks	rehayes	4943d 00h	/
85	Corrections to instruction set details example code, added test bench debugger.	rehayes	5217d 09h	/
84	Added notes on SKIPJACK encrypt/decrypt applications, testbench debugger and user guide corrections.	rehayes	5217d 09h	/
83	Add subroutine quailifier.	rehayes	5217d 10h	/
82	Added debug module to assist in software debugging.	rehayes	5218d 04h	/
81	Initial checkin of the SKIPJACK encrypt/decrypt application program	rehayes	5218d 05h	/
80	Added IRQ bypass registers and Test bench appendix	rehayes	5280d 05h	/
79	Added IRQ bypass registers and Test bench appendix	rehayes	5280d 05h	/
78	Added IRQ bypass registers and Test bench appendix	rehayes	5280d 05h	/
77	Documentation update	rehayes	5280d 05h	/
76	Updated xgate_risc.v for xlink synthesis warnings.	rehayes	5303d 06h	/
75	Fixed xlink synthesis warnings noted by Nachiket Jugade, missing else statment for chid_sm_ns line 393, mising default on shifter lines 2382	rehayes	5303d 07h	/