URL https://opencores.org/ocsvn/xge_mac/xge_mac/trunk

Subversion Repositories xge_mac

[/] - Rev 23

Rev	Log message	Author	Age	Path
23	Adding basic packet stats	antanguay	4361d 13h	/
22	Added prototype system verilog testbench	antanguay	4363d 10h	/
21	Improvements for timing, adding alternate FIFO design using XIL define	antanguay	4363d 10h	/
20	Updates for Xilinx synthesis	antanguay	4653d 05h	/
19	Updates for 32/64 bit systems	antanguay	4828d 06h	/
18	Updates for linux 32-bit	antanguay	4829d 02h	/
17	Fixed deprecated SystemC warnings	antanguay	4831d 10h	/
16	Rename tb_xge_mac.v to sv extension to fix issue with newer Modelsim	antanguay	4831d 17h	/
15	Updated for Verilator 3.813	antanguay	4850d 17h	/
14	Change interface to big endian, added serdes examples to testbench	antanguay	5439d 11h	/
13	Change interface to big endian, added serdes examples to testbench	antanguay	5439d 12h	/
12	Change interface to big endian, added serdes examples to testbench	antanguay	5439d 12h	/
11	Fixed clock crossing	antanguay	5545d 09h	/
10	Added details to spec	antanguay	5643d 04h	/
9	Added old uploaded documents to new repository.	root	5717d 16h	/
8	Added old uploaded documents to new repository.	root	5717d 21h	/
7	New directory structure.	root	5717d 21h	/
6	Updated spec. Added mod[2:0] signals. Timing improvements.	antanguay	5994d 05h	/
5	Fixed compilation	antanguay	6000d 05h	/
4	Created	antanguay	6000d 08h	/