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Rev Log message Author Age Path
59 Simplified logic. dgisselq 3242d 12h /
58 Bug fix: the UART can now be reconfigured post-boot without a BREAK condition. dgisselq 3242d 12h /
57 Fixed the TX/RX addresses so that they match the documentation: TX first, then
RX.		 dgisselq 3250d 12h /
56 Brings code in line with the OpenCores core: parameterizes the reload value,
and the number of bits in the timer.		 dgisselq 3250d 12h /
55 Updated copyright notice. dgisselq 3250d 12h /
54 Updated copyright notice. dgisselq 3250d 12h /
53 Added a touch of error checking. dgisselq 3290d 12h /
52 This brings the XuLA2-LX25 SoC up to speed with the rest of the ZipCPU, and
prepares it for the 32x32 bit multiply instruction set change.		 dgisselq 3290d 12h /
51 Lots of bug fixes. The ugliest were in the prefetch cache, where instructions
from one cache line were being issued as valid in another. Other fixes include
pipeline fixes so that LOD (Rx),Rx; LOD(Rx),Rx works, and more. Finally, the
decode was adjusted so that brev no longer affects the flags.		 dgisselq 3300d 11h /
50 Updates to fix some broken early branching code, both in idecode and pfcache. dgisselq 3309d 13h /
49 Added some documentation to make the read and write calls easier to understand. dgisselq 3318d 14h /
48 Cleaned up the documentation a touch. It no longer reads like the bugs I used
to debug are still being debugged ...		 dgisselq 3320d 15h /
47 Fixes the "NAN" clocks/second output, as well as making input timing come closer
to a realistic timing. (I actually don't know what timing the JTAG port is
providing, but ... the new timer is closer.)		 dgisselq 3320d 15h /
46 This is a bug fix release--fixing the bug that kept dumpsdram.cpp/wbsdram.v
from working when long pipelined reads were interrupted by the necessity of
a pair of refresh cycles.		 dgisselq 3320d 15h /
45 Minor cosmetic change, eliminates a warning in Xilinx's XISE but offers no
functional difference.		 dgisselq 3324d 11h /
44 NELM parameter adjusted to reflect the maximum number of lines the compressed
scope can handle: 31, not 32.		 dgisselq 3324d 11h /
43 Commentary changes only, no substance. dgisselq 3324d 11h /
42 Minor changes. dgisselq 3324d 11h /
41 Bug fix. This was preventing dumpsdram from accurately reading back what
had been written to the RAM earlier.		 dgisselq 3324d 11h /
40 This adds to dumpsdram the capability to run over a port, such as with
busmaster_tb.		 dgisselq 3325d 22h /

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