OpenCores
URL https://opencores.org/ocsvn/xulalx25soc/xulalx25soc/trunk

Subversion Repositories xulalx25soc

[/] - Rev 82

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
82 dgisselq 3090d 20h /
81 Adds register values for the SD-Card registers. dgisselq 3090d 20h /
80 Currently working version: contains both a working DMA controller as well as
a working (as far as I can tell) SD-Card controller (writes not yet tested).
dgisselq 3090d 20h /
79 Adds 'bench' and 'sw' targets, and automatically builds them (now). dgisselq 3090d 20h /
78 Comments out the line that caused a compiler warning--setting an unused
variable. Code should be better as a result.
dgisselq 3090d 20h /
77 Adds register names and values for the SD card interface. dgisselq 3090d 20h /
76 Now tries to avoid reading from the stack if the stack addresses are already
known to be bad. That way, the debugger tries to preserve any bus error address
already on the buserr device.
dgisselq 3090d 20h /
75 Added simulation capability for the SD-Card, as well as debugging output for the
DMA. (The SD-Card debug may not be fully featured, yet, but it has gotten me
to where I can talk to the card.)
dgisselq 3090d 21h /
74 Adds the SD-card capability, and connects the debug wires to/from the uartdev
in case it needs to be debugged.
dgisselq 3090d 21h /
73 Simplified logic. dgisselq 3090d 21h /
72 Sets XULA25 as the default. dgisselq 3090d 21h /
71 Needed to play with subtle timing to get this to build. Expect me to play
with these two clock numbers more.
dgisselq 3090d 21h /
70 Cosmetic (minor) update. dgisselq 3090d 21h /
69 Massive logic simplification. This is also the first (verified) working
version.
dgisselq 3090d 21h /
68 Fixes the debug ack line, so it no longer acks when there isn't a dbg_stb.
Fixed the multiply option parameter, so it sets a 3-clock multiply properly.
Adjusted the watchdog timer so that it now produces a timer that doesn't
reload--since this is pointless for a watchdog. Finally, connects a reset
line to the DMA, to make certain that resetting the CPU will also reset any
ongoing DMA operation.
dgisselq 3090d 21h /
67 Simplifies logic, and guarantees that the minimum set value will always
produce an int. For example, if the count was X before, setting X-1 wouldn't
produce an interrupt since it had passed. Now it produces an interrupt, and
keeps the next interrupt valid.
dgisselq 3090d 21h /
66 Simplified logic (barely). dgisselq 3090d 21h /
65 Makes the auto-reload feature a parameterized (generic) feature, so the same
code will work for both auto-reloadable and non-autoreloadable (i.e. watchdog)
timers.
dgisselq 3090d 21h /
64 First (verified) working version. dgisselq 3090d 21h /
63 Simplified logic. dgisselq 3090d 21h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.