OpenCores
URL https://opencores.org/ocsvn/xulalx25soc/xulalx25soc/trunk

Subversion Repositories xulalx25soc

[/] - Rev 88

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
88 Adjusted copyright date. dgisselq 3089d 01h /
87 Placed the interrupt into the carry chain for less logic area. dgisselq 3089d 01h /
86 Fine tuning the `defines, so that you can build pipelined without pipelined
bus access and so forth.		 dgisselq 3089d 01h /
85 First version of the SD-SPI interface, with partial functionality. (No the
empty link that was here before.)		 dgisselq 3092d 22h /
84 First part of switching to proper sdspi.v, and not just the link. dgisselq 3092d 22h /
83 Fixes a bug in the LX9 build whereby the flash was never ever granted permission
to use the SPI port.		 dgisselq 3094d 02h /
82 dgisselq 3094d 21h /
81 Adds register values for the SD-Card registers. dgisselq 3094d 21h /
80 Currently working version: contains both a working DMA controller as well as
a working (as far as I can tell) SD-Card controller (writes not yet tested).		 dgisselq 3094d 21h /
79 Adds 'bench' and 'sw' targets, and automatically builds them (now). dgisselq 3094d 21h /
78 Comments out the line that caused a compiler warning--setting an unused
variable. Code should be better as a result.		 dgisselq 3094d 21h /
77 Adds register names and values for the SD card interface. dgisselq 3094d 21h /
76 Now tries to avoid reading from the stack if the stack addresses are already
known to be bad. That way, the debugger tries to preserve any bus error address
already on the buserr device.		 dgisselq 3094d 21h /
75 Added simulation capability for the SD-Card, as well as debugging output for the
DMA. (The SD-Card debug may not be fully featured, yet, but it has gotten me
to where I can talk to the card.)		 dgisselq 3094d 21h /
74 Adds the SD-card capability, and connects the debug wires to/from the uartdev
in case it needs to be debugged.		 dgisselq 3094d 21h /
73 Simplified logic. dgisselq 3094d 21h /
72 Sets XULA25 as the default. dgisselq 3094d 22h /
71 Needed to play with subtle timing to get this to build. Expect me to play
with these two clock numbers more.		 dgisselq 3094d 22h /
70 Cosmetic (minor) update. dgisselq 3094d 22h /
69 Massive logic simplification. This is also the first (verified) working
version.		 dgisselq 3094d 22h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.