URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] [8051/] [tags/] [rel_1/] [rtl/] [verilog/] [oc8051_icache.v] - Rev 186

Rev	Log message	Author	Age	Path
186		root	5543d 13h	/8051/tags/rel_1/rtl/verilog/oc8051_icache.v
185		root	5599d 14h	/8051/tags/rel_1/rtl/verilog/oc8051_icache.v
147	This commit was manufactured by cvs2svn to create tag 'rel_1'.		7728d 12h	/8051/tags/rel_1/rtl/verilog/oc8051_icache.v
137	change to fit xrom.	simont	7735d 18h	/8051/tags/rel_1/rtl/verilog/oc8051_icache.v
108	fix some bugs, use oc8051_cache_ram.	simont	7767d 09h	/8051/tags/rel_1/rtl/verilog/oc8051_icache.v
94	fix bug.	simont	7768d 17h	/8051/tags/rel_1/rtl/verilog/oc8051_icache.v
88	fix bugs	simont	7839d 14h	/8051/tags/rel_1/rtl/verilog/oc8051_icache.v
82	replace some modules	simont	7847d 14h	/8051/tags/rel_1/rtl/verilog/oc8051_icache.v
67	add parameters for instruction cache	simont	7928d 15h	/8051/tags/rel_1/rtl/verilog/oc8051_icache.v
62	fix bugs in instruction interface	simont	7929d 11h	/8051/tags/rel_1/rtl/verilog/oc8051_icache.v