URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] [8051/] [tags/] [rel_1/] [rtl/] [verilog/] [oc8051_multiply.v] - Rev 186

Rev	Log message	Author	Age	Path
186		root	5567d 14h	/8051/tags/rel_1/rtl/verilog/oc8051_multiply.v
185		root	5623d 15h	/8051/tags/rel_1/rtl/verilog/oc8051_multiply.v
147	This commit was manufactured by cvs2svn to create tag 'rel_1'.		7752d 13h	/8051/tags/rel_1/rtl/verilog/oc8051_multiply.v
95	updating...	simont	7792d 18h	/8051/tags/rel_1/rtl/verilog/oc8051_multiply.v
46	prepared header	simont	7976d 12h	/8051/tags/rel_1/rtl/verilog/oc8051_multiply.v
32	overflow repaired	simont	8004d 18h	/8051/tags/rel_1/rtl/verilog/oc8051_multiply.v
25	divider and multiplier pass test	markom	8015d 14h	/8051/tags/rel_1/rtl/verilog/oc8051_multiply.v
21	mul bug fixed	markom	8016d 15h	/8051/tags/rel_1/rtl/verilog/oc8051_multiply.v
20	multiplier and divider changed so they complete in 4 cycles	markom	8016d 17h	/8051/tags/rel_1/rtl/verilog/oc8051_multiply.v
5	more linter corrections; 2 tests still fail	markom	8023d 16h	/8051/tags/rel_1/rtl/verilog/oc8051_multiply.v
4	Code repaired to satisfy the linter; testbech fails	markom	8023d 18h	/8051/tags/rel_1/rtl/verilog/oc8051_multiply.v
2	Initial CVS import	simont	8039d 16h	/8051/tags/rel_1/rtl/verilog/oc8051_multiply.v