URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] [8051/] [tags/] [rel_12/] [rtl/] [verilog/] [oc8051_alu_src_sel.v] - Rev 186

Rev	Log message	Author	Age	Path
186		root	5531d 06h	/8051/tags/rel_12/rtl/verilog/oc8051_alu_src_sel.v
185		root	5587d 08h	/8051/tags/rel_12/rtl/verilog/oc8051_alu_src_sel.v
182	This commit was manufactured by cvs2svn to create tag 'rel_12'.		7666d 00h	/8051/tags/rel_12/rtl/verilog/oc8051_alu_src_sel.v
179	add /* synopsys xx_case */ to case statments.	simont	7666d 01h	/8051/tags/rel_12/rtl/verilog/oc8051_alu_src_sel.v
151	remove pc_r register.	simont	7694d 04h	/8051/tags/rel_12/rtl/verilog/oc8051_alu_src_sel.v
141	remove define OC8051_AS2_PCL, chane signal src_sel2 to 2 bit wide.	simont	7722d 12h	/8051/tags/rel_12/rtl/verilog/oc8051_alu_src_sel.v
81	initial import	simont	7835d 07h	/8051/tags/rel_12/rtl/verilog/oc8051_alu_src_sel.v