OpenCores
URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] [8051/] [tags/] [rel_12/] [rtl/] [verilog/] [oc8051_rom.v] - Rev 186

Rev

Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
186 root 5531d 06h /8051/tags/rel_12/rtl/verilog/oc8051_rom.v
185 root 5587d 07h /8051/tags/rel_12/rtl/verilog/oc8051_rom.v
182 This commit was manufactured by cvs2svn to create tag 'rel_12'. 7665d 23h /8051/tags/rel_12/rtl/verilog/oc8051_rom.v
179 add /* synopsys xx_case */ to case statments. simont 7666d 01h /8051/tags/rel_12/rtl/verilog/oc8051_rom.v
149 pipelined acces to axternal instruction interface added. simont 7694d 04h /8051/tags/rel_12/rtl/verilog/oc8051_rom.v
109 add `include "oc8051_defines.v" simont 7755d 02h /8051/tags/rel_12/rtl/verilog/oc8051_rom.v
92 initial inport simont 7756d 10h /8051/tags/rel_12/rtl/verilog/oc8051_rom.v

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.