URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] [8051/] [tags/] [rel_2/] [rtl/] [verilog/] [oc8051_indi_addr.v] - Rev 186

Rev	Log message	Author	Age	Path
186		root	5572d 22h	/8051/tags/rel_2/rtl/verilog/oc8051_indi_addr.v
185		root	5628d 23h	/8051/tags/rel_2/rtl/verilog/oc8051_indi_addr.v
180	This commit was manufactured by cvs2svn to create tag 'rel_2'.		7707d 16h	/8051/tags/rel_2/rtl/verilog/oc8051_indi_addr.v
179	add /* synopsys xx_case */ to case statments.	simont	7707d 16h	/8051/tags/rel_2/rtl/verilog/oc8051_indi_addr.v
139	add aditional alu destination to solve critical path.	simont	7764d 21h	/8051/tags/rel_2/rtl/verilog/oc8051_indi_addr.v
82	replace some modules	simont	7876d 23h	/8051/tags/rel_2/rtl/verilog/oc8051_indi_addr.v
46	prepared header	simont	7981d 19h	/8051/tags/rel_2/rtl/verilog/oc8051_indi_addr.v
5	more linter corrections; 2 tests still fail	markom	8029d 00h	/8051/tags/rel_2/rtl/verilog/oc8051_indi_addr.v
4	Code repaired to satisfy the linter; testbech fails	markom	8029d 02h	/8051/tags/rel_2/rtl/verilog/oc8051_indi_addr.v
2	Initial CVS import	simont	8044d 23h	/8051/tags/rel_2/rtl/verilog/oc8051_indi_addr.v