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[/] [8051/] [tags/] [rel_2/] [rtl/] [verilog/] [oc8051_tc.v] - Rev 186

Rev	Log message	Author	Age	Path
186		root	5546d 02h	/8051/tags/rel_2/rtl/verilog/oc8051_tc.v
185		root	5602d 03h	/8051/tags/rel_2/rtl/verilog/oc8051_tc.v
180	This commit was manufactured by cvs2svn to create tag 'rel_2'.		7680d 20h	/8051/tags/rel_2/rtl/verilog/oc8051_tc.v
179	add /* synopsys xx_case */ to case statments.	simont	7680d 20h	/8051/tags/rel_2/rtl/verilog/oc8051_tc.v
120	defines for pherypherals added	simont	7763d 04h	/8051/tags/rel_2/rtl/verilog/oc8051_tc.v
116	change sfr's interface.	simont	7766d 02h	/8051/tags/rel_2/rtl/verilog/oc8051_tc.v
112	change timers to meet timing specifications (add divider with 12)	simont	7769d 06h	/8051/tags/rel_2/rtl/verilog/oc8051_tc.v
82	replace some modules	simont	7850d 03h	/8051/tags/rel_2/rtl/verilog/oc8051_tc.v
46	prepared header	simont	7954d 23h	/8051/tags/rel_2/rtl/verilog/oc8051_tc.v
17	fix some bugs	simont	7999d 03h	/8051/tags/rel_2/rtl/verilog/oc8051_tc.v
4	Code repaired to satisfy the linter; testbech fails	markom	8002d 06h	/8051/tags/rel_2/rtl/verilog/oc8051_tc.v
2	Initial CVS import	simont	8018d 03h	/8051/tags/rel_2/rtl/verilog/oc8051_tc.v