URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] [8051/] [trunk/] [rtl/] [verilog/] [oc8051_icache.v] - Rev 186

Rev	Log message	Author	Age	Path
186		root	5641d 15h	/8051/trunk/rtl/verilog/oc8051_icache.v
185		root	5697d 16h	/8051/trunk/rtl/verilog/oc8051_icache.v
179	add /* synopsys xx_case */ to case statments.	simont	7776d 10h	/8051/trunk/rtl/verilog/oc8051_icache.v
174	ram modules added.	simont	7787d 17h	/8051/trunk/rtl/verilog/oc8051_icache.v
137	change to fit xrom.	simont	7833d 20h	/8051/trunk/rtl/verilog/oc8051_icache.v
108	fix some bugs, use oc8051_cache_ram.	simont	7865d 11h	/8051/trunk/rtl/verilog/oc8051_icache.v
94	fix bug.	simont	7866d 19h	/8051/trunk/rtl/verilog/oc8051_icache.v
88	fix bugs	simont	7937d 16h	/8051/trunk/rtl/verilog/oc8051_icache.v
82	replace some modules	simont	7945d 16h	/8051/trunk/rtl/verilog/oc8051_icache.v
67	add parameters for instruction cache	simont	8026d 17h	/8051/trunk/rtl/verilog/oc8051_icache.v
62	fix bugs in instruction interface	simont	8027d 13h	/8051/trunk/rtl/verilog/oc8051_icache.v