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[/] [8051/] [trunk/] [rtl/] [verilog/] [oc8051_indi_addr.v] - Rev 186

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186 root 5680d 15h /8051/trunk/rtl/verilog/oc8051_indi_addr.v
185 root 5736d 17h /8051/trunk/rtl/verilog/oc8051_indi_addr.v
179 add /* synopsys xx_case */ to case statments. simont 7815d 10h /8051/trunk/rtl/verilog/oc8051_indi_addr.v
139 add aditional alu destination to solve critical path. simont 7872d 15h /8051/trunk/rtl/verilog/oc8051_indi_addr.v
82 replace some modules simont 7984d 16h /8051/trunk/rtl/verilog/oc8051_indi_addr.v
46 prepared header simont 8089d 13h /8051/trunk/rtl/verilog/oc8051_indi_addr.v
5 more linter corrections; 2 tests still fail markom 8136d 18h /8051/trunk/rtl/verilog/oc8051_indi_addr.v
4 Code repaired to satisfy the linter; testbech fails markom 8136d 19h /8051/trunk/rtl/verilog/oc8051_indi_addr.v
2 Initial CVS import simont 8152d 17h /8051/trunk/rtl/verilog/oc8051_indi_addr.v

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