URL https://opencores.org/ocsvn/System09/System09/trunk

Subversion Repositories System09

[/] [System09/] [trunk/] [rtl/] [System09_Digilent_Atlys/] [system09.prj] - Rev 182

Rev	Log message	Author	Age	Path
175	Corrected RS-232 pin connections. Cleaned up code. Removed debug code. System boots but the baud clock must be wrong - get garbage on hyperterm.	davidgb	1382d 08h	/System09/trunk/rtl/System09_Digilent_Atlys/system09.prj
174	Added button debounce. Single-step button. multiplex LED to show nibbles of addr and data for debug. Confirmed that CPU is reading from sys09swt.vhd SBug ROM correctly. Still need to debug ACIA output.	davidgb	1382d 12h	/System09/trunk/rtl/System09_Digilent_Atlys/system09.prj
173	Add another 16k BRAM for 56K total memory	davidgb	1384d 07h	/System09/trunk/rtl/System09_Digilent_Atlys/system09.prj
170	More debugging. Can now see cpu_addr incrementing correctly. Added 32k BRAM 0000-7FFF.	davidgb	1384d 13h	/System09/trunk/rtl/System09_Digilent_Atlys/system09.prj
157	Switch to stock SWT boot rom and flex9ram	davidgb	1385d 13h	/System09/trunk/rtl/System09_Digilent_Atlys/system09.prj
152	More atlys cleanup	davidgb	1628d 23h	/System09/trunk/rtl/System09_Digilent_Atlys/system09.prj
148	Check in Atlys work	davidgb	1628d 23h	/System09/trunk/rtl/System09_Digilent_Atlys/system09.prj
146		davidgb	1630d 12h	/System09/trunk/rtl/System09_Digilent_Atlys/system09.prj
141	Started work on version for Digilent Atlys SPARTAN6 board (does not build, just infrastructure to start the project)	davidgb	1664d 16h	/System09/trunk/rtl/System09_Digilent_Atlys/system09.prj