URL https://opencores.org/ocsvn/System09/System09/trunk

Subversion Repositories System09

[/] [System09/] [trunk/] [rtl/] [System09_Digilent_Atlys/] [system09.ucf] - Rev 188

Rev	Log message	Author	Age	Path
186	Somewhat functional boot to SBUG. ACIA freq is wrong but sometimes works if hyperterm set to 115kBps	davidgb	1402d 03h	/System09/trunk/rtl/System09_Digilent_Atlys/system09.ucf
185	Reverted back to the single-step version - something was broken	davidgb	1402d 04h	/System09/trunk/rtl/System09_Digilent_Atlys/system09.ucf
175	Corrected RS-232 pin connections. Cleaned up code. Removed debug code. System boots but the baud clock must be wrong - get garbage on hyperterm.	davidgb	1402d 18h	/System09/trunk/rtl/System09_Digilent_Atlys/system09.ucf
174	Added button debounce. Single-step button. multiplex LED to show nibbles of addr and data for debug. Confirmed that CPU is reading from sys09swt.vhd SBug ROM correctly. Still need to debug ACIA output.	davidgb	1402d 22h	/System09/trunk/rtl/System09_Digilent_Atlys/system09.ucf
170	More debugging. Can now see cpu_addr incrementing correctly. Added 32k BRAM 0000-7FFF.	davidgb	1404d 23h	/System09/trunk/rtl/System09_Digilent_Atlys/system09.ucf
168	Added more pinloc info. Switched RS-232 to use PMOD connector for more h/w debug visibility.	davidgb	1405d 04h	/System09/trunk/rtl/System09_Digilent_Atlys/system09.ucf
148	Check in Atlys work	davidgb	1649d 09h	/System09/trunk/rtl/System09_Digilent_Atlys/system09.ucf
141	Started work on version for Digilent Atlys SPARTAN6 board (does not build, just infrastructure to start the project)	davidgb	1685d 02h	/System09/trunk/rtl/System09_Digilent_Atlys/system09.ucf