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[/] [System09/] [trunk/] [rtl/] [System09_Digilent_Atlys/] [system09.xise] - Rev 215

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Rev Log message Author Age Path
215 Update project after switching to xilinx block ram davidgb 1167d 21h /System09/trunk/rtl/System09_Digilent_Atlys/system09.xise
213 updated project file davidgb 1167d 21h /System09/trunk/rtl/System09_Digilent_Atlys/system09.xise
209 Started adding in keyboard (not tested).
Added in green-only VGA output thru Pmod port to PmodVGA J2 port.
Started working on HDMI output		 davidgb 1167d 23h /System09/trunk/rtl/System09_Digilent_Atlys/system09.xise
192 Fixed part of the ACIA problem - the polarity of the NMI was wrong. Now get clean output but input to the ACIA is not working. davidgb 1233d 22h /System09/trunk/rtl/System09_Digilent_Atlys/system09.xise
185 Reverted back to the single-step version - something was broken davidgb 1240d 23h /System09/trunk/rtl/System09_Digilent_Atlys/system09.xise
175 Corrected RS-232 pin connections. Cleaned up code. Removed debug code.
System boots but the baud clock must be wrong - get garbage on hyperterm.		 davidgb 1241d 13h /System09/trunk/rtl/System09_Digilent_Atlys/system09.xise
174 Added button debounce. Single-step button. multiplex LED to show nibbles of addr and data for debug. Confirmed that CPU is reading from sys09swt.vhd SBug ROM correctly. Still need to debug ACIA output. davidgb 1241d 17h /System09/trunk/rtl/System09_Digilent_Atlys/system09.xise
173 Add another 16k BRAM for 56K total memory davidgb 1243d 12h /System09/trunk/rtl/System09_Digilent_Atlys/system09.xise
170 More debugging. Can now see cpu_addr incrementing correctly.
Added 32k BRAM 0000-7FFF.		 davidgb 1243d 18h /System09/trunk/rtl/System09_Digilent_Atlys/system09.xise
158 switch to stock SWT boot rom and flex9ram davidgb 1244d 18h /System09/trunk/rtl/System09_Digilent_Atlys/system09.xise
152 More atlys cleanup davidgb 1488d 04h /System09/trunk/rtl/System09_Digilent_Atlys/system09.xise
148 Check in Atlys work davidgb 1488d 04h /System09/trunk/rtl/System09_Digilent_Atlys/system09.xise
146 davidgb 1489d 17h /System09/trunk/rtl/System09_Digilent_Atlys/system09.xise
141 Started work on version for Digilent Atlys SPARTAN6 board (does not build, just infrastructure to start the project) davidgb 1523d 21h /System09/trunk/rtl/System09_Digilent_Atlys/system09.xise

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