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[/] [aemb/] [branches/] [DEV_SYBREON/] [rtl/] [verilog/] [aeMB2_edk32.v] - Rev 191

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191 New directory structure. root 5625d 07h /aemb/branches/DEV_SYBREON/rtl/verilog/aeMB2_edk32.v
115 This commit was manufactured by cvs2svn to create branch 'DEV_SYBREON'. 5957d 09h /aemb/branches/DEV_SYBREON/rtl/verilog/aeMB2_edk32.v
92 Partitioned simulation model. sybreon 6072d 06h /aemb/branches/DEV_SYBREON/rtl/verilog/aeMB2_edk32.v
89 Changed simulation kernel. sybreon 6073d 12h /aemb/branches/DEV_SYBREON/rtl/verilog/aeMB2_edk32.v
85 Replaced OF/ID blocks with combined block. sybreon 6074d 22h /aemb/branches/DEV_SYBREON/rtl/verilog/aeMB2_edk32.v
82 Further optimisations (speed + size). sybreon 6077d 04h /aemb/branches/DEV_SYBREON/rtl/verilog/aeMB2_edk32.v
81 Code cleanup + minor speed regression. sybreon 6077d 05h /aemb/branches/DEV_SYBREON/rtl/verilog/aeMB2_edk32.v
80 Minor optimisations (~10% faster) sybreon 6078d 06h /aemb/branches/DEV_SYBREON/rtl/verilog/aeMB2_edk32.v
78 initial import sybreon 6080d 00h /aemb/branches/DEV_SYBREON/rtl/verilog/aeMB2_edk32.v
76 initial sybreon 6083d 06h /aemb/branches/DEV_SYBREON/rtl/verilog/aeMB2_edk32.v

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