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[/] [aemb/] [branches/] [DEV_SYBREON/] [rtl/] [verilog/] [aeMB2_edk32.v] - Rev 193

Rev	Log message	Author	Age	Path
191	New directory structure.	root	5691d 09h	/aemb/branches/DEV_SYBREON/rtl/verilog/aeMB2_edk32.v
115	This commit was manufactured by cvs2svn to create branch 'DEV_SYBREON'.		6023d 12h	/aemb/branches/DEV_SYBREON/rtl/verilog/aeMB2_edk32.v
92	Partitioned simulation model.	sybreon	6138d 09h	/aemb/branches/DEV_SYBREON/rtl/verilog/aeMB2_edk32.v
89	Changed simulation kernel.	sybreon	6139d 15h	/aemb/branches/DEV_SYBREON/rtl/verilog/aeMB2_edk32.v
85	Replaced OF/ID blocks with combined block.	sybreon	6141d 00h	/aemb/branches/DEV_SYBREON/rtl/verilog/aeMB2_edk32.v
82	Further optimisations (speed + size).	sybreon	6143d 06h	/aemb/branches/DEV_SYBREON/rtl/verilog/aeMB2_edk32.v
81	Code cleanup + minor speed regression.	sybreon	6143d 07h	/aemb/branches/DEV_SYBREON/rtl/verilog/aeMB2_edk32.v
80	Minor optimisations (~10% faster)	sybreon	6144d 08h	/aemb/branches/DEV_SYBREON/rtl/verilog/aeMB2_edk32.v
78	initial import	sybreon	6146d 03h	/aemb/branches/DEV_SYBREON/rtl/verilog/aeMB2_edk32.v
76	initial	sybreon	6149d 09h	/aemb/branches/DEV_SYBREON/rtl/verilog/aeMB2_edk32.v