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[/] [aemb/] [branches/] [DEV_SYBREON/] [rtl/] [verilog/] [aeMB_ibuf.v] - Rev 195

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Rev Log message Author Age Path
191 New directory structure. root 5628d 19h /aemb/branches/DEV_SYBREON/rtl/verilog/aeMB_ibuf.v
115 This commit was manufactured by cvs2svn to create branch 'DEV_SYBREON'. 5960d 22h /aemb/branches/DEV_SYBREON/rtl/verilog/aeMB_ibuf.v
105 Patch interrupt bug. sybreon 6042d 12h /aemb/branches/DEV_SYBREON/rtl/verilog/aeMB_ibuf.v
103 Patched problem where memory access followed by dual cycle instructions were not stalling correctly (submitted by M. Ettus) sybreon 6043d 21h /aemb/branches/DEV_SYBREON/rtl/verilog/aeMB_ibuf.v
96 Stalls pipeline on MUL/BSF instructions results in minor speed improvements. sybreon 6068d 15h /aemb/branches/DEV_SYBREON/rtl/verilog/aeMB_ibuf.v
70 Change interrupt to positive level triggered interrupts. sybreon 6101d 22h /aemb/branches/DEV_SYBREON/rtl/verilog/aeMB_ibuf.v
63 Fixed interrupt signal synchronisation. sybreon 6109d 14h /aemb/branches/DEV_SYBREON/rtl/verilog/aeMB_ibuf.v
61 Changed interrupt handling system (reported by M. Ettus). sybreon 6109d 15h /aemb/branches/DEV_SYBREON/rtl/verilog/aeMB_ibuf.v
55 Upgraded license to LGPLv3.
Significant performance optimisations.		 sybreon 6113d 21h /aemb/branches/DEV_SYBREON/rtl/verilog/aeMB_ibuf.v
45 Minor code cleanup. sybreon 6121d 05h /aemb/branches/DEV_SYBREON/rtl/verilog/aeMB_ibuf.v
44 Added better (beta) interrupt support.
Changed MSR_IE to disabled at reset as per MB docs.		 sybreon 6121d 18h /aemb/branches/DEV_SYBREON/rtl/verilog/aeMB_ibuf.v
41 New EDK 3.2 compatible design with optional barrel-shifter and multiplier.
Fixed various minor data hazard bugs.
Code compatible with -O0/1/2/3/s generated code.		 sybreon 6122d 10h /aemb/branches/DEV_SYBREON/rtl/verilog/aeMB_ibuf.v

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