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[/] [aemb/] [tags/] [AEMB_7_05/] [rtl/] [verilog/] [aeMB_regfile.v] - Rev 206

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191 New directory structure. root 5627d 17h /aemb/tags/AEMB_7_05/rtl/verilog/aeMB_regfile.v
37 This commit was manufactured by cvs2svn to create tag 'AEMB_7_05'. 6290d 02h /aemb/tags/AEMB_7_05/rtl/verilog/aeMB_regfile.v
36 Removed asynchronous reset signal. sybreon 6290d 02h /aemb/tags/AEMB_7_05/rtl/verilog/aeMB_regfile.v
34 Corrected speed issues after rev 1.9 update. sybreon 6291d 12h /aemb/tags/AEMB_7_05/rtl/verilog/aeMB_regfile.v
31 Removed byte acrobatics. sybreon 6306d 19h /aemb/tags/AEMB_7_05/rtl/verilog/aeMB_regfile.v
28 Fixed simulation bug. sybreon 6309d 20h /aemb/tags/AEMB_7_05/rtl/verilog/aeMB_regfile.v
26 Fixed minor synthesis bug. sybreon 6310d 07h /aemb/tags/AEMB_7_05/rtl/verilog/aeMB_regfile.v
25 Added code documentation.
Improved size & speed of rtl/verilog/aeMB_aslu.v
sybreon 6310d 11h /aemb/tags/AEMB_7_05/rtl/verilog/aeMB_regfile.v
24 Made minor performance optimisations. sybreon 6310d 21h /aemb/tags/AEMB_7_05/rtl/verilog/aeMB_regfile.v
23 Fixed minor simulation bug. sybreon 6311d 12h /aemb/tags/AEMB_7_05/rtl/verilog/aeMB_regfile.v
22 Added support for 8-bit and 16-bit data types. sybreon 6311d 13h /aemb/tags/AEMB_7_05/rtl/verilog/aeMB_regfile.v
18 Moved testbench into /sim/verilog.
Simulation cleanups.
sybreon 6324d 15h /aemb/tags/AEMB_7_05/rtl/verilog/aeMB_regfile.v
17 Cosmetic changes sybreon 6325d 19h /aemb/tags/AEMB_7_05/rtl/verilog/aeMB_regfile.v
16 Added pipeline stalling from incomplete bus cycles.
Separated sync and async portions of code.
sybreon 6326d 07h /aemb/tags/AEMB_7_05/rtl/verilog/aeMB_regfile.v
14 Added initial interrupt/exception support. sybreon 6332d 21h /aemb/tags/AEMB_7_05/rtl/verilog/aeMB_regfile.v
8 Fixed memory read-write data hazard sybreon 6333d 05h /aemb/tags/AEMB_7_05/rtl/verilog/aeMB_regfile.v
5 Fixed endian correction issues on data bus. sybreon 6333d 20h /aemb/tags/AEMB_7_05/rtl/verilog/aeMB_regfile.v
4 Fixed a minor bug where RD is trashed by a STORE instruction. Spotted by Joon Lee. sybreon 6341d 23h /aemb/tags/AEMB_7_05/rtl/verilog/aeMB_regfile.v
3 initial import sybreon 6358d 17h /aemb/tags/AEMB_7_05/rtl/verilog/aeMB_regfile.v

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