URL https://opencores.org/ocsvn/aemb/aemb/trunk

Subversion Repositories aemb

[/] [aemb/] [trunk/] [rtl/] [verilog/] [aeMB_ctrl.v] - Rev 206

Rev	Log message	Author	Age	Path
191	New directory structure.	root	5585d 01h	/aemb/trunk/rtl/verilog/aeMB_ctrl.v
72	Minor code cleanup.	sybreon	6050d 03h	/aemb/trunk/rtl/verilog/aeMB_ctrl.v
65	Fixed minor typo causing synthesis failure.	sybreon	6065d 10h	/aemb/trunk/rtl/verilog/aeMB_ctrl.v
62	Fixed minor typo.	sybreon	6065d 20h	/aemb/trunk/rtl/verilog/aeMB_ctrl.v
61	Changed interrupt handling system (reported by M. Ettus).	sybreon	6065d 21h	/aemb/trunk/rtl/verilog/aeMB_ctrl.v
55	Upgraded license to LGPLv3. Significant performance optimisations.	sybreon	6070d 03h	/aemb/trunk/rtl/verilog/aeMB_ctrl.v
53	Added GET/PUT support through a FSL bus.	sybreon	6070d 23h	/aemb/trunk/rtl/verilog/aeMB_ctrl.v
51	Fixed data WISHBONE arbitration problem (reported by J Lee).	sybreon	6072d 02h	/aemb/trunk/rtl/verilog/aeMB_ctrl.v
50	Parameterised optional components.	sybreon	6072d 05h	/aemb/trunk/rtl/verilog/aeMB_ctrl.v
44	Added better (beta) interrupt support. Changed MSR_IE to disabled at reset as per MB docs.	sybreon	6078d 00h	/aemb/trunk/rtl/verilog/aeMB_ctrl.v
41	New EDK 3.2 compatible design with optional barrel-shifter and multiplier. Fixed various minor data hazard bugs. Code compatible with -O0/1/2/3/s generated code.	sybreon	6078d 16h	/aemb/trunk/rtl/verilog/aeMB_ctrl.v