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[/] [aemb/] [trunk/] [rtl/] [verilog/] [aeMB_xecu.v] - Rev 207

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Rev	Log message	Author	Age	Path
191	New directory structure.	root	5757d 01h	/aemb/trunk/rtl/verilog/aeMB_xecu.v
159	Backported Adder from AEMB2_EDK62. Fixes 64-bit math problem reported by M. Ettus.	sybreon	6059d 05h	/aemb/trunk/rtl/verilog/aeMB_xecu.v
102	Fix MTS during interrupt vectoring bug (reported by M. Ettus).	sybreon	6172d 03h	/aemb/trunk/rtl/verilog/aeMB_xecu.v
96	Stalls pipeline on MUL/BSF instructions results in minor speed improvements.	sybreon	6196d 21h	/aemb/trunk/rtl/verilog/aeMB_xecu.v
72	Minor code cleanup.	sybreon	6222d 02h	/aemb/trunk/rtl/verilog/aeMB_xecu.v
66	Added fsl_tag_o to FSL bus (tag either address or data).	sybreon	6235d 21h	/aemb/trunk/rtl/verilog/aeMB_xecu.v
61	Changed interrupt handling system (reported by M. Ettus).	sybreon	6237d 21h	/aemb/trunk/rtl/verilog/aeMB_xecu.v
55	Upgraded license to LGPLv3. Significant performance optimisations.	sybreon	6242d 03h	/aemb/trunk/rtl/verilog/aeMB_xecu.v
53	Added GET/PUT support through a FSL bus.	sybreon	6242d 22h	/aemb/trunk/rtl/verilog/aeMB_xecu.v
50	Parameterised optional components.	sybreon	6244d 05h	/aemb/trunk/rtl/verilog/aeMB_xecu.v
45	Minor code cleanup.	sybreon	6249d 11h	/aemb/trunk/rtl/verilog/aeMB_xecu.v
44	Added better (beta) interrupt support. Changed MSR_IE to disabled at reset as per MB docs.	sybreon	6250d 00h	/aemb/trunk/rtl/verilog/aeMB_xecu.v
41	New EDK 3.2 compatible design with optional barrel-shifter and multiplier. Fixed various minor data hazard bugs. Code compatible with -O0/1/2/3/s generated code.	sybreon	6250d 16h	/aemb/trunk/rtl/verilog/aeMB_xecu.v

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