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[/] [altor32/] [trunk/] [rtl/] [soc/] [cpu_if.v] - Rev 35

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Rev Log message Author Age Path
32 Switch memory interfaces to Wishbone (pipelined).
Various bug fixes and improvements.
ultra_embedded 3965d 01h /altor32/trunk/rtl/soc/cpu_if.v
27 Initial drop of AltOR32 v2 ultra_embedded 4070d 00h /altor32/trunk/rtl/soc/cpu_if.v

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