URL https://opencores.org/ocsvn/amber/amber/trunk

Subversion Repositories amber

[/] [amber/] [trunk/] [hw/] [tests/] [irq_stm.S] - Rev 77

Rev	Log message	Author	Age	Path
35	Amber25 improvements: Use 128-bit wishbone bus, instead of 32-bit to reduce cache miss fetch times Use a fast barrel shifter for shifts between 0 and 4 to improve timing Use a 2 cycle full barrel shifter for complex shifts	csantifort	4922d 03h	/amber/trunk/hw/tests/irq_stm.S
17	amber25 core bug fix. The return address for irq interrupts was off by 4 bytes when the interrupt occurred during a stm instruction with the following instruction having some register conflicts. Added test irq_stm to catch the bug. Cleaned up some header descriptions	csantifort	5011d 01h	/amber/trunk/hw/tests/irq_stm.S