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[/] [amber/] [trunk/] [hw/] [vlog/] [system/] [timer_module.v] - Rev 57

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Rev Log message Author Age Path
35 Amber25 improvements:
Use 128-bit wishbone bus, instead of 32-bit to reduce cache miss fetch times
Use a fast barrel shifter for shifts between 0 and 4 to improve timing
Use a 2 cycle full barrel shifter for complex shifts
csantifort 4930d 08h /amber/trunk/hw/vlog/system/timer_module.v
2 Baseline release of the Amber 2 core csantifort 5052d 06h /amber/trunk/hw/vlog/system/timer_module.v

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