URL https://opencores.org/ocsvn/amber/amber/trunk

Subversion Repositories amber

[/] [amber/] [trunk/] [hw/] [vlog/] [system/] [wb_xs6_ddr3_bridge.v] - Rev 72

Rev	Log message	Author	Age	Path
63	Add support for Xilinx ISim Verilog simulator. Remove Virtex-6 files.	csantifort	4213d 21h	/amber/trunk/hw/vlog/system/wb_xs6_ddr3_bridge.v
36	Changed boot_mem for the a25 system to be 128 bits wide to match the 128-bit wide wishbone bus	csantifort	4920d 10h	/amber/trunk/hw/vlog/system/wb_xs6_ddr3_bridge.v
15	Copied amber to amber23, Many system changes to support new amber25 core.	csantifort	5013d 05h	/amber/trunk/hw/vlog/system/wb_xs6_ddr3_bridge.v
11	Added vmlinux test.	csantifort	5029d 17h	/amber/trunk/hw/vlog/system/wb_xs6_ddr3_bridge.v
2	Baseline release of the Amber 2 core	csantifort	5043d 15h	/amber/trunk/hw/vlog/system/wb_xs6_ddr3_bridge.v