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[/] [amber/] [trunk/] [hw/] [vlog/] [xs6_ddr3/] [README.txt] - Rev 72

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64 Support latest Xilinx ISE 14.5 software. csantifort 4213d 17h /amber/trunk/hw/vlog/xs6_ddr3/README.txt
52 Fixed typo in notes on creating DDR memory interfaces using coregen csantifort 4820d 11h /amber/trunk/hw/vlog/xs6_ddr3/README.txt
41 Added instructions on how to use Coregen to create the Spartan-6 DDR3 memory interface. csantifort 4912d 18h /amber/trunk/hw/vlog/xs6_ddr3/README.txt

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