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[/] [ata/] [trunk/] [rtl/] [verilog/] [ocidec-1/] [revision_history.txt] - Rev 33

Rev	Log message	Author	Age	Path
33	New directory structure.	root	5620d 00h	/ata/trunk/rtl/verilog/ocidec-1/revision_history.txt
32	Fixed a potential bug where the core was forced into an unknown state when an asynchronous reset was given without a running clock.	rherveille	8106d 13h	/ata/trunk/rtl/verilog/ocidec-1/revision_history.txt
23	Moved wishbone interface into 'atahost_wb_slave.v' Major revisions in all cores.	rherveille	8196d 04h	/ata/trunk/rtl/verilog/ocidec-1/revision_history.txt
22	Added disclaimer Added CVS information Changed core for new internal counter libraries (synthesis fixes).	rherveille	8198d 08h	/ata/trunk/rtl/verilog/ocidec-1/revision_history.txt
19	Changed RST_LVL define to parameter. Removed atahost_define.v	rherveille	8321d 10h	/ata/trunk/rtl/verilog/ocidec-1/revision_history.txt
17	Changed top-level. Made asynchronous reset programmable.	rherveille	8355d 10h	/ata/trunk/rtl/verilog/ocidec-1/revision_history.txt
15	Changed filenames and top-level port names to be conform new OpenCores conventions	rherveille	8383d 07h	/ata/trunk/rtl/verilog/ocidec-1/revision_history.txt
14	created new directory structure	rherveille	8395d 08h	/ata/trunk/rtl/verilog/ocidec-1/revision_history.txt