URL https://opencores.org/ocsvn/axi4_tlm_bfm/axi4_tlm_bfm/trunk

Subversion Repositories axi4_tlm_bfm

[/] [axi4_tlm_bfm/] [trunk/] [rtl/] [quartus-synthesis/] [pll.vhd] - Rev 16

Rev	Log message	Author	Age	Path
14	Added simple reset logic and verified on hardware. Added PLL to supply test clock to SignalTap.	daniel.kho	3921d 15h	/axi4_tlm_bfm/trunk/rtl/quartus-synthesis/pll.vhd