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[/] [axi_master/] [trunk/] [src/] [base/] [def_axi_master_static.txt] - Rev 17

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16 RobustVerilog version 1.4 compatible eyalhoc 4796d 14h /axi_master/trunk/src/base/def_axi_master_static.txt
15 Support RobustVerilog project eyalhoc 4809d 00h /axi_master/trunk/src/base/def_axi_master_static.txt
14 GUI support eyalhoc 4815d 19h /axi_master/trunk/src/base/def_axi_master_static.txt
13 eyalhoc 4824d 19h /axi_master/trunk/src/base/def_axi_master_static.txt
10 minor fixes eyalhoc 4844d 03h /axi_master/trunk/src/base/def_axi_master_static.txt
6 added check_single and write_and_check_single tasks
added option to random data by address
eyalhoc 4856d 18h /axi_master/trunk/src/base/def_axi_master_static.txt
2 eyalhoc 4865d 20h /axi_master/trunk/src/base/def_axi_master_static.txt

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