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[/] [axi_vga/] [trunk/] [rtl/] [vga_out.v] - Rev 4

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4 The source code in the rtl direction. I add the model files and sim file. I use the modelsim to simulate it. I use the AXI master port to access the DRAM and send image data to TFT. hugoliu 1824d 10h /axi_vga/trunk/rtl/vga_out.v

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