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[/] [can/] [tags/] [rel_11/] [rtl/] [verilog/] [can_defines.v] - Rev 163

Rev	Log message	Author	Age	Path
161	New directory structure.	root	5599d 16h	/can/tags/rel_11/rtl/verilog/can_defines.v
105	This commit was manufactured by cvs2svn to create tag 'rel_11'.		7669d 09h	/can/tags/rel_11/rtl/verilog/can_defines.v
95	Virtual silicon ram instances added.	simons	7681d 14h	/can/tags/rel_11/rtl/verilog/can_defines.v
71	Ports added for the CAN_BIST.	mohor	7700d 00h	/can/tags/rel_11/rtl/verilog/can_defines.v
64	* empty log message *	mohor	7780d 18h	/can/tags/rel_11/rtl/verilog/can_defines.v
59	8051 interface added (besides WISHBONE interface). Selection is made in can_defines.v file.	mohor	7789d 07h	/can/tags/rel_11/rtl/verilog/can_defines.v
51	Xilinx RAM added.	mohor	7795d 20h	/can/tags/rel_11/rtl/verilog/can_defines.v
48	Actel APA ram supported.	mohor	7799d 12h	/can/tags/rel_11/rtl/verilog/can_defines.v
28	Bosch license warning added. Error counters finished. Overload frames still need to be fixed.	mohor	7820d 09h	/can/tags/rel_11/rtl/verilog/can_defines.v
9	Header changed, testbench improved to send a frame (crc still missing).	mohor	7864d 11h	/can/tags/rel_11/rtl/verilog/can_defines.v
2	Initial	mohor	7870d 19h	/can/tags/rel_11/rtl/verilog/can_defines.v