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[/] [can/] [tags/] [rel_3/] [rtl/] [verilog/] [can_fifo.v] - Rev 163

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Rev Log message Author Age Path
161 New directory structure. root 5660d 09h /can/tags/rel_3/rtl/verilog/can_fifo.v
74 This commit was manufactured by cvs2svn to create tag 'rel_3'. 7758d 19h /can/tags/rel_3/rtl/verilog/can_fifo.v
73 overrun and length_info fifos are initialized at the end of reset. mohor 7758d 19h /can/tags/rel_3/rtl/verilog/can_fifo.v
51 Xilinx RAM added. mohor 7856d 13h /can/tags/rel_3/rtl/verilog/can_fifo.v
48 Actel APA ram supported. mohor 7860d 05h /can/tags/rel_3/rtl/verilog/can_fifo.v
39 CAN core finished. Host interface added. Registers finished.
Synchronization to the wishbone finished.		 mohor 7870d 14h /can/tags/rel_3/rtl/verilog/can_fifo.v
35 Several registers added. Not finished, yet. mohor 7875d 08h /can/tags/rel_3/rtl/verilog/can_fifo.v
31 Wishbone interface added. mohor 7879d 03h /can/tags/rel_3/rtl/verilog/can_fifo.v
28 Bosch license warning added. Error counters finished. Overload frames
still need to be fixed.		 mohor 7881d 02h /can/tags/rel_3/rtl/verilog/can_fifo.v
24 backup. mohor 7890d 03h /can/tags/rel_3/rtl/verilog/can_fifo.v
23 Fifo corrected to be synthesizable. mohor 7903d 11h /can/tags/rel_3/rtl/verilog/can_fifo.v
18 When a frame with "remote request" is received, no data is stored to fifo, just the frame information (identifier, ...). Data length that is stored is the received data length and not the actual data length that is stored to fifo. mohor 7905d 15h /can/tags/rel_3/rtl/verilog/can_fifo.v
17 Addresses corrected to decimal values (previously hex). mohor 7906d 11h /can/tags/rel_3/rtl/verilog/can_fifo.v
16 rx_fifo is now working. mohor 7906d 16h /can/tags/rel_3/rtl/verilog/can_fifo.v
14 rx fifo added. Not 100 % verified, yet. mohor 7911d 06h /can/tags/rel_3/rtl/verilog/can_fifo.v
13 Temporary files (backup). mohor 7911d 14h /can/tags/rel_3/rtl/verilog/can_fifo.v
11 Acceptance filter added. mohor 7913d 02h /can/tags/rel_3/rtl/verilog/can_fifo.v

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