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[/] [can/] [tags/] [rel_7/] [rtl/] [verilog/] [can_fifo.v] - Rev 161

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Rev Log message Author Age Path
161 New directory structure. root 5608d 22h /can/tags/rel_7/rtl/verilog/can_fifo.v
94 This commit was manufactured by cvs2svn to create tag 'rel_7'. 7696d 07h /can/tags/rel_7/rtl/verilog/can_fifo.v
85 Typo fixed. mohor 7699d 18h /can/tags/rel_7/rtl/verilog/can_fifo.v
73 overrun and length_info fifos are initialized at the end of reset. mohor 7707d 08h /can/tags/rel_7/rtl/verilog/can_fifo.v
51 Xilinx RAM added. mohor 7805d 02h /can/tags/rel_7/rtl/verilog/can_fifo.v
48 Actel APA ram supported. mohor 7808d 18h /can/tags/rel_7/rtl/verilog/can_fifo.v
39 CAN core finished. Host interface added. Registers finished.
Synchronization to the wishbone finished.		 mohor 7819d 02h /can/tags/rel_7/rtl/verilog/can_fifo.v
35 Several registers added. Not finished, yet. mohor 7823d 21h /can/tags/rel_7/rtl/verilog/can_fifo.v
31 Wishbone interface added. mohor 7827d 16h /can/tags/rel_7/rtl/verilog/can_fifo.v
28 Bosch license warning added. Error counters finished. Overload frames
still need to be fixed.		 mohor 7829d 15h /can/tags/rel_7/rtl/verilog/can_fifo.v
24 backup. mohor 7838d 16h /can/tags/rel_7/rtl/verilog/can_fifo.v
23 Fifo corrected to be synthesizable. mohor 7851d 23h /can/tags/rel_7/rtl/verilog/can_fifo.v
18 When a frame with "remote request" is received, no data is stored to fifo, just the frame information (identifier, ...). Data length that is stored is the received data length and not the actual data length that is stored to fifo. mohor 7854d 04h /can/tags/rel_7/rtl/verilog/can_fifo.v
17 Addresses corrected to decimal values (previously hex). mohor 7855d 00h /can/tags/rel_7/rtl/verilog/can_fifo.v
16 rx_fifo is now working. mohor 7855d 05h /can/tags/rel_7/rtl/verilog/can_fifo.v
14 rx fifo added. Not 100 % verified, yet. mohor 7859d 19h /can/tags/rel_7/rtl/verilog/can_fifo.v
13 Temporary files (backup). mohor 7860d 02h /can/tags/rel_7/rtl/verilog/can_fifo.v
11 Acceptance filter added. mohor 7861d 15h /can/tags/rel_7/rtl/verilog/can_fifo.v

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