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[/] [can/] [tags/] [rel_7/] [rtl/] [verilog/] [can_top.v] - Rev 163

Rev	Log message	Author	Age	Path
161	New directory structure.	root	5608d 15h	/can/tags/rel_7/rtl/verilog/can_top.v
94	This commit was manufactured by cvs2svn to create tag 'rel_7'.		7696d 01h	/can/tags/rel_7/rtl/verilog/can_top.v
81	"chip select" signal cs_can_i is used only when not using WISHBONE interface.	mohor	7700d 20h	/can/tags/rel_7/rtl/verilog/can_top.v
78	tx_point generated one clk earlier. rx_i registered. Data corrected when using extended mode.	mohor	7701d 21h	/can/tags/rel_7/rtl/verilog/can_top.v
77	Synchronization is also needed when transmitting a message.	mohor	7704d 19h	/can/tags/rel_7/rtl/verilog/can_top.v
75	When switching to tx, sync stage is overjumped.	mohor	7706d 20h	/can/tags/rel_7/rtl/verilog/can_top.v
71	Ports added for the CAN_BIST.	mohor	7708d 23h	/can/tags/rel_7/rtl/verilog/can_top.v
67	CAN interrupt is active low.	mohor	7783d 23h	/can/tags/rel_7/rtl/verilog/can_top.v
66	unix.	mohor	7789d 17h	/can/tags/rel_7/rtl/verilog/can_top.v