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[/] [csa/] [trunk/] [bench/] [csa_pli.c] - Rev 40

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40 add timescale.v file and fix a bug in key_schedule module simon111 5699d 15h /csa/trunk/bench/csa_pli.c
37 improve write_data systemcall, simon111 5700d 17h /csa/trunk/bench/csa_pli.c
36 improve read_date vpi sytemcall, add offset and size argument simon111 5700d 19h /csa/trunk/bench/csa_pli.c
35 csa cli support binary test data simon111 5700d 23h /csa/trunk/bench/csa_pli.c
24 New directory structure. root 5739d 06h /csa/trunk/bench/csa_pli.c
20 finished the stream_cypher module, this module passed modelsim , but doesn't pass veriwell, i don't know why simon111 5876d 12h /csa/trunk/bench/csa_pli.c
15 finished key_schedule module simon111 5945d 13h /csa/trunk/bench/csa_pli.c
13 add key_schedule module(note: this module is not right yet) simon111 5946d 14h /csa/trunk/bench/csa_pli.c

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