OpenCores
URL https://opencores.org/ocsvn/csa/csa/trunk

Subversion Repositories csa

[/] [csa/] [trunk/] [bench/] [makefile] - Rev 52

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
51 remove the using to iverilog and veriwell simon111 5598d 09h /csa/trunk/bench/makefile
40 add timescale.v file and fix a bug in key_schedule module simon111 5614d 22h /csa/trunk/bench/makefile
29 fix some bugs simon111 5617d 21h /csa/trunk/bench/makefile
27 improve makefiles simon111 5618d 08h /csa/trunk/bench/makefile
24 New directory structure. root 5654d 14h /csa/trunk/bench/makefile
23 testing key_schedule module simon111 5737d 21h /csa/trunk/bench/makefile
22 decrypt module testbench update simon111 5777d 21h /csa/trunk/bench/makefile
20 finished the stream_cypher module, this module passed modelsim , but doesn't pass veriwell, i don't know why simon111 5791d 20h /csa/trunk/bench/makefile
18 try to add decrypt module (not finished yet) simon111 5801d 21h /csa/trunk/bench/makefile
17 finish block_decypher module simon111 5853d 03h /csa/trunk/bench/makefile
15 finished key_schedule module simon111 5860d 21h /csa/trunk/bench/makefile
12 *** empty log message *** simon111 5861d 21h /csa/trunk/bench/makefile
9 add the pli module and bench for key_perm module simon111 5894d 23h /csa/trunk/bench/makefile

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.