URL https://opencores.org/ocsvn/dbg_interface/dbg_interface/trunk

Subversion Repositories dbg_interface

[/] [dbg_interface/] [tags/] [rel_6/] [sim/] [rtl_sim/] [run/] [do.do] - Rev 158

Rev	Log message	Author	Age	Path
158		root	5589d 14h	/dbg_interface/tags/rel_6/sim/rtl_sim/run/do.do
64	This commit was manufactured by cvs2svn to create tag 'rel_6'.		7610d 20h	/dbg_interface/tags/rel_6/sim/rtl_sim/run/do.do
36	Structure changed. Hooks for jtag chain added.	mohor	8148d 18h	/dbg_interface/tags/rel_6/sim/rtl_sim/run/do.do
17	dbg_timescale.v changed to timescale.v This is done for the simulation of few different cores in a single project.	mohor	8288d 22h	/dbg_interface/tags/rel_6/sim/rtl_sim/run/do.do
5	Trace fixed. Some registers changed, trace simplified.	mohor	8319d 19h	/dbg_interface/tags/rel_6/sim/rtl_sim/run/do.do
2	Initial official release.	mohor	8324d 20h	/dbg_interface/tags/rel_6/sim/rtl_sim/run/do.do