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[/] [dblclockfft/] [trunk/] [rtl/] [hwbfly.v] - Rev 40

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39 Updated Verilog, added window function demo dgisselq 2072d 01h /dblclockfft/trunk/rtl/hwbfly.v
36 Added several new modes to the FFT

This makes the FFT core generator a generator for a generic
pipelined FFT--whether it be two samples per clock, one
sample per clock, one sample per two clocks, or even one
sample every three clocks.

This version works in simulation, with some formal checks
as well.
dgisselq 2331d 06h /dblclockfft/trunk/rtl/hwbfly.v

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