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[/] [debouncer_vhdl/] [trunk/] [bench/] [debounce_atlys_top_bit.zip] - Rev 7

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7 - Changed verification project to have all debug signals to fit on a 16 digital signals for the Tek MSO2014 scope.
- Added scope photos of verified circuit
jdoin 4833d 19h /debouncer_vhdl/trunk/bench/debounce_atlys_top_bit.zip
6 - fixed some minor comments errors;
- added ISE report files;
- added generated bitgen file (zipped) to test in the Digilent Atlys board;
jdoin 4834d 16h /debouncer_vhdl/trunk/bench/debounce_atlys_top_bit.zip

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