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[/] [eco32/] [trunk/] [fpga/] [mc/] [boards/] [s3e-500/] [build/] [eco32.bit] - Rev 291

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Rev Log message Author Age Path
291 avoid timing violations in DDR RAM circuit, new .bit files generated hellwig 3505d 06h /eco32/trunk/fpga/mc/boards/s3e-500/build/eco32.bit
290 Wishbone-compatible bus signals hellwig 3507d 07h /eco32/trunk/fpga/mc/boards/s3e-500/build/eco32.bit
288 new directory structure within fpga hellwig 3508d 04h /eco32/trunk/fpga/mc/boards/s3e-500/build/eco32.bit
242 monitor for Digilent board honors console I/O switch setting hellwig 3821d 00h /eco32/trunk/fpga/mc/boards/s3e-500/build/eco32.bit
237 project and bit file for Digilent board hellwig 3822d 15h /eco32/trunk/fpga/mc/boards/s3e-500/build/eco32.bit
231 DAC controller added to ECO32 for XESS board hellwig 3827d 00h /eco32/trunk/fpga/mc/boards/s3e-500/build/eco32.bit
229 organizing hardware hellwig 3827d 13h /eco32/trunk/fpga/mc/boards/s3e-500/build/eco32.bit
228 integration of starter board version hellwig 3828d 04h /eco32/trunk/fpga/mc/boards/s3e-500/build/eco32.bit

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