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[/] [eco32/] [trunk/] [fpga/] [mc/] [src/] [ram/] [ddr/] [ram.v] - Rev 302

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Rev Log message Author Age Path
291 avoid timing violations in DDR RAM circuit, new .bit files generated hellwig 3410d 22h /eco32/trunk/fpga/mc/src/ram/ddr/ram.v
290 Wishbone-compatible bus signals hellwig 3412d 22h /eco32/trunk/fpga/mc/src/ram/ddr/ram.v
288 new directory structure within fpga hellwig 3413d 20h /eco32/trunk/fpga/mc/src/ram/ddr/ram.v
219 organizing hardware hellwig 3737d 06h /eco32/trunk/fpga/mc/src/ram/ddr/ram.v

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