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[/] [eco32/] [trunk/] [fpga/] [mc/] [src/] [ram/] [sdr/] [ram.v] - Rev 291

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Rev Log message Author Age Path
290 Wishbone-compatible bus signals hellwig 3389d 07h /eco32/trunk/fpga/mc/src/ram/sdr/ram.v
288 new directory structure within fpga hellwig 3390d 04h /eco32/trunk/fpga/mc/src/ram/sdr/ram.v
219 organizing hardware hellwig 3713d 14h /eco32/trunk/fpga/mc/src/ram/sdr/ram.v
126 hardware: ram pin ordering hellwig 3899d 13h /eco32/trunk/fpga/mc/src/ram/sdr/ram.v
119 hardware: ram now equivalent to port-15 hellwig 3900d 23h /eco32/trunk/fpga/mc/src/ram/sdr/ram.v
27 fpga implementation unpacked hellwig 3925d 12h /eco32/trunk/fpga/mc/src/ram/sdr/ram.v

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